Step-by-step guide to upgrading from ROCm 7.0.2 to ROCm 7.2 on an AMD Ryzen AI MAX+ 395 system with the Radeon 8060S (gfx1151) GPU. Covers the full uninstall-reinstall procedure on Ubuntu 24.04, DKMS verification, kernel hold management, and post-upgrade PyTorch validation on Strix Halo hardware that isn't officially on AMD's support matrix.
How Lattice moved from a tree-walking interpreter to a bytecode compiler and stack-based VM — covering the architecture of a 62-opcode instruction set, upvalue-based closures, phase system compilation, and the subtle bug that taught me how deep-clone-on-read interacts with in-place mutation.
A deep dive into running FireRed-Image-Edit, a 57.7GB diffusion model, on two wildly different GPU platforms: four 10-year-old NVIDIA Tesla P40s from 2016 and a single AMD Strix Halo APU from 2025. Covers the precision and quantization challenges of Pascal GPUs, multi-GPU device orchestration, and the surprising performance parity between decade-old datacenter hardware and a modern integrated GPU.
Building a comprehensive ISA test suite for the Sampo 16-bit RISC CPU and running all 132 tests on the ULX3S FPGA with zero failures - after finding a pipeline hazard bug and a devious address-shifting patch bug along the way.
The final chapter: getting CP/M to boot correctly on the Arduino Giga R1 WiFi with a RetroShield Z80, debugging the "Bad load" error, achieving a 75x performance speedup through GPIO optimization, and playing Zork I on real Z80 hardware over WiFi.
How Lattice treats mutability as a runtime-observable, constrainable, and reactive property — moving beyond const/let into a full lifecycle system for data state.
Porting CP/M 2.2 from an Arduino Mega to the Giga R1 WiFi turned into a deep dive on TXB0108 level converter failures, shadow register tracking, and building a Rust sector server for WiFi-based disk I/O.
Comprehensive review and benchmark analysis of the Milk-V Mars, a RISC-V single board computer powered by the StarFive JH7110 SoC with four SiFive U74-MC cores and 8GB RAM. Rust compilation benchmarks reveal it's the slowest board in our test fleet at 936 seconds average, but the board tells an important story about RISC-V's current state and the architectural diversity emerging in the SBC market.
An introduction to Lattice, a new programming language built around a novel crystallization-based phase system for managing mutability and memory. This post explores how Lattice's flux/fix/freeze/thaw/forge model differs from existing approaches like Rust's ownership, garbage collection, and traditional immutability, and why treating variable mutability as a physical phase transition leads to clearer, safer programs.
A tiny C compiler written entirely in Z80 assembly that reads source code over serial and generates executable Z80 machine code, inspired by SectorC's 512-byte x86-16 compiler.
