Milk-V Mars Review: SiFive's RISC-V Enters the SBC Arena

Introduction

The Milk-V Mars is a compact RISC-V single board computer built around StarFive's JH7110 system-on-chip, featuring four SiFive U74-MC application cores and 8GB of LPDDR4 RAM. Priced affordably and shipping in a Raspberry Pi-like form factor, the Mars targets developers and enthusiasts who want to explore the RISC-V ecosystem on real hardware without investing in high-end development boards.

This review arrives at an interesting moment for RISC-V single board computers. We've already benchmarked the Orange Pi RV2 with its 8-core Ky(R) X1 processor, and the Milk-V Mars gives us a second data point in the RISC-V SBC landscape - this time with SiFive's cores, the company widely regarded as the pioneer of commercial RISC-V silicon. How does a board built on SiFive's mature U74 core design compare to the newer Ky X1, and where does it land against the ARM and x86 competition? The answers are illuminating, if not entirely encouraging.

Hardware Architecture: SiFive U74-MC on StarFive JH7110

At the heart of the Milk-V Mars sits the StarFive JH7110, a 28nm SoC that pairs four SiFive U74-MC application cores with a single SiFive S7 monitor core. The U74 is SiFive's 64-bit application processor core implementing the RV64GC instruction set (rv64imafdc) - the standard RISC-V profile with integer multiplication, atomic operations, single and double-precision floating point, and compressed instructions. The cores feature an in-order, dual-issue, 8-stage pipeline with separate L1 instruction and data caches, backed by a shared 2MB L2 cache. For readers wanting to understand the ISA itself, The RISC-V Reader is an excellent and concise introduction to the architecture and its design rationale.

The SiFive U74 has an important place in RISC-V history. As one of the first commercially available application-class RISC-V cores, it powered the HiFive Unmatched development board that many early RISC-V adopters used to explore the architecture. The U74-MC variant in the JH7110 is a cost-optimized version without the memory management features of the full U74, targeting embedded and SBC applications rather than server or workstation use.

However, the U74's in-order pipeline design places it at a fundamental architectural disadvantage compared to modern out-of-order ARM cores. While the Cortex-A76 in a Raspberry Pi 5 can speculatively execute instructions, reorder them for optimal throughput, and predict branches with sophisticated algorithms refined over years of iteration, the U74 executes instructions strictly in program order. This simplicity reduces silicon area and power consumption but significantly limits single-threaded performance - the metric that matters most for many real-world workloads.

The JH7110 is fabricated on TSMC's 28nm process, which is two to three generations behind the 8nm and 6nm processes used in contemporary ARM SoCs like the Rockchip RK3588. This older process node limits clock speeds, increases power consumption per transistor, and constrains the amount of logic that can be economically integrated into the die.

Board Specifications

Our test unit came configured with:

• SoC: StarFive JH7110 (28nm process)
• CPU: 4x SiFive U74-MC @ 1.5 GHz (RV64GC)
• Monitor Core: 1x SiFive S7
• RAM: 8GB LPDDR4
• Storage: microSD card (29GB card installed, expandable)
• Networking: Gigabit Ethernet
• OS: Debian GNU/Linux Bookworm (kernel 5.15.0)
• USB: USB 3.0 and USB 2.0 ports
• Video: HDMI output
• GPIO: 40-pin header (Raspberry Pi compatible layout)

The 8GB of RAM is generous for a board in this class - more than many ARM SBCs ship with by default - and proved more than adequate for our Rust compilation benchmarks. The microSD card storage is adequate but not exceptional; the board does support eMMC modules for better storage performance, though our test unit used a standard SD card.

One notable issue we encountered during setup: the factory image shipped with a root partition of only 3.8GB on a 29GB SD card. This is common with SBC images but particularly problematic here because installing the Rust toolchain and build dependencies requires significant disk space. We expanded the partition using parted and resize2fs before proceeding - a standard operation, but one that new users might find daunting.

Software Environment

The Milk-V Mars runs Debian Bookworm with a Linux 5.15.0 kernel, a relatively old kernel version compared to the 6.x kernels shipping on more recent ARM and RISC-V boards. The kernel includes StarFive-specific patches for JH7110 hardware support, but the older base means newer kernel features and optimizations aren't available.

The software experience is functional but bare. The system ships as a minimal Debian installation - no build tools, no git, no development packages preinstalled. Setting up the board for development required installing build-essential, git, curl, and bc via apt before we could proceed with Rust installation. The Debian repositories worked without issues, and rustup installed cleanly for the riscv64gc-unknown-linux-gnu target, delivering Rust 1.93.1 - the latest stable release at the time of testing.

This is actually a positive sign for the RISC-V ecosystem. Rust's official support for RISC-V has matured to the point where rustup "just works" on riscv64gc targets. Compare this to just a few years ago when RISC-V Rust development required building the compiler from source. The toolchain infrastructure has come a long way, even if the hardware performance hasn't yet caught up to ARM. If you're new to Rust and want to understand the language driving these benchmarks, The Rust Programming Language by Klabnik and Nichols is the definitive starting point.

Performance Testing: Rust Compilation Benchmarks

To assess the Milk-V Mars's CPU performance, we ran our standard benchmark: compiling the ballistics-engine Rust project in release mode, three times from a clean build state. This workload exercises all CPU cores through parallel compilation units, stresses the memory subsystem with large intermediate data structures, and measures real-world compiler and linker performance - the kind of task a developer would encounter daily.

Milk-V Mars Compilation Times

• Run 1: 939.13 seconds (15 minutes 38 seconds)
• Run 2: 933.45 seconds (15 minutes 33 seconds)
• Run 3: 935.96 seconds (15 minutes 35 seconds)
• Average: 936.18 seconds (15 minutes 36 seconds)
• Standard Deviation: 2.85 seconds (0.30%)

The first thing that stands out is the remarkable consistency. A standard deviation of just 2.85 seconds across three 15-minute runs indicates stable thermal behavior and no throttling - the board maintained consistent performance throughout the entire test sequence. This suggests good power delivery and adequate thermal management, even without active cooling.

The second thing that stands out is the absolute time: over 15 minutes per compilation. This is the slowest result in our entire benchmark fleet.

Comparative Analysis

Here's how the Milk-V Mars stacks up against every board we've benchmarked:

Rank	System	Architecture	CPU	Cores	Average Time	vs. Mars
1	Orange Pi 5 Max	ARM64	Cortex-A55/A76	8 (4+4)	62.31s	15.0x faster
2	Raspberry Pi CM5	ARM64	Cortex-A76	4	71.04s	13.2x faster
3	LattePanda IOTA	x86_64	Intel N150	4	72.21s	13.0x faster
4	Raspberry Pi 5	ARM64	Cortex-A76	4	76.65s	12.2x faster
5	Banana Pi CM5-Pro	ARM64	Cortex-A53/A72	8 (4+4)	167.15s	5.6x faster
6	Horizon X3 CM	ARM64	Cortex-A53	4	378.81s	2.5x faster
7	Orange Pi RV2	RISC-V	Ky(R) X1	8	650.60s	1.4x faster
8	Milk-V Mars	RISC-V	SiFive U74-MC	4	936.18s	baseline

The Milk-V Mars is 15x slower than the fastest board in our fleet (Orange Pi 5 Max) and 12.2x slower than the ubiquitous Raspberry Pi 5. Even the much-maligned Horizon X3 CM with its ancient Cortex-A53 cores is 2.5x faster.

Understanding the Performance Gap

The 15x gap between the Milk-V Mars and the Orange Pi 5 Max isn't surprising when you understand the architectural differences at play:

In-order vs. out-of-order execution. The U74's in-order pipeline means the CPU stalls whenever it encounters a cache miss, branch misprediction, or data dependency. Modern out-of-order cores like the Cortex-A76 can continue executing independent instructions while waiting for stalled operations to complete. For a workload like Rust compilation, which involves complex data structures, frequent branching, and irregular memory access patterns, out-of-order execution provides enormous benefits. Hennessy and Patterson's Computer Architecture: A Quantitative Approach covers the engineering trade-offs between in-order and out-of-order pipelines in detail.

Clock speed. The U74 runs at 1.5 GHz compared to 2.4 GHz for the Cortex-A76 cores in the Pi 5 and Orange Pi 5 Max. This 1.6x frequency disadvantage compounds with the architectural differences to create a much larger effective performance gap.

Process technology. The JH7110's 28nm fabrication limits the transistor budget available for performance-enhancing features like larger caches, more complex branch predictors, and wider execution units. Modern ARM SoCs on 8nm or smaller processes can pack significantly more logic into the same power envelope.

Compiler maturity. While LLVM's RISC-V backend has improved substantially, it still lacks many of the target-specific optimizations that the ARM backend has accumulated over years of development. Code generation for RISC-V may not always exploit the microarchitecture as effectively as ARM code generation exploits Cortex-A76 features.

Core count. The Mars has four cores versus eight on the Orange Pi 5 Max. For parallel compilation workloads, more cores translate directly to faster builds, all else being equal.

RISC-V vs. RISC-V: Mars vs. Orange Pi RV2

Perhaps the most interesting comparison is between the two RISC-V boards in our fleet. The Orange Pi RV2 with its 8-core Ky(R) X1 processor compiled our benchmark in 650.60 seconds - 1.44x faster than the Milk-V Mars's 936.18 seconds.

This 44% performance advantage for the Orange Pi RV2 can be attributed to two factors:

Double the cores. The Ky X1 has eight cores versus the U74's four. For parallel compilation, this provides a near-linear speedup for the parallel portions of the build, though Amdahl's Law limits the overall benefit due to serial bottlenecks in linking and code generation.

Newer core design. The Ky X1 represents a more recent RISC-V core design than the U74, likely incorporating microarchitectural improvements that boost instructions-per-clock (IPC). While details about the Ky X1's pipeline are scarce, its performance-per-core appears to be modestly better than the U74's.

However, both RISC-V boards exist in the same performance tier - dramatically slower than ARM and x86 alternatives. The 286-second gap between the Mars and the RV2 is notable but pales in comparison to the 874-second gap between the Mars and the Orange Pi 5 Max. Both RISC-V platforms are firmly in "pioneer hardware" territory, demonstrating architectural viability rather than competitive performance.

The SiFive Legacy: Historical Context

It's worth acknowledging what the SiFive U74 represents historically. SiFive, founded in 2015 by the creators of the RISC-V instruction set at UC Berkeley, was the first company to offer commercial RISC-V cores. The U74 was their first serious application-class core, designed at a time when RISC-V was still primarily an academic project.

The HiFive Unmatched, which used the same JH7110-predecessor (the FU740), was one of the first RISC-V boards capable of running a full Linux desktop. It proved that RISC-V could work for general-purpose computing. The Milk-V Mars, using the JH7110 with U74-MC cores, is essentially a cost-reduced descendant of that pioneering effort.

In this light, the U74's performance is less a failure and more a measure of how far the RISC-V ecosystem has come - and how far it still needs to go. The U74 was designed for correctness and compatibility, not performance leadership. Newer SiFive cores like the P670 and P870 incorporate out-of-order execution, branch prediction, and other modern features that should dramatically close the gap with ARM. We haven't yet seen these cores in affordable SBC form factors, but when they arrive, the comparison should be far more competitive.

Practical Considerations

Who Should Buy the Milk-V Mars?

RISC-V learners and enthusiasts. If you want to understand RISC-V at a hardware level - boot Linux, explore the ISA, compile software, and experiment with the architecture - the Mars is a low-cost entry point. The 8GB of RAM is generous, and the Debian software environment is functional enough for exploration.

Embedded RISC-V developers. If you're developing software that will eventually run on RISC-V embedded systems, the Mars provides a Linux-capable development and testing platform. Cross-compilation workflows (develop on x86, test on RISC-V) are viable, and native compilation works - it just takes patience.

SBC collectors and architecture enthusiasts. The Mars represents an important moment in RISC-V history. As SiFive's application-class cores in an affordable SBC, it has both practical and historical value for anyone tracking the evolution of processor architectures.

Who Should Look Elsewhere?

Anyone needing competitive performance. If compilation speed, application responsiveness, or computational throughput matter for your use case, the Raspberry Pi 5 delivers 12x better performance at a similar price point. There is no workload where the Mars outperforms modern ARM alternatives.

Production deployments. The combination of slow CPU performance, older kernel, and limited software ecosystem makes the Mars unsuitable for production use cases. Even RISC-V-specific production deployments would benefit from waiting for next-generation hardware.

AI and machine learning. The Mars lacks any AI acceleration hardware, and its CPU performance makes even lightweight inference workloads impractical. Our experience running TinyLlama on the Orange Pi RV2 at 0.44 tokens per second suggests the Mars would be even slower given its lower core count and comparable per-core performance.

The Bigger Picture: RISC-V's Two-Board Story

Having now benchmarked two RISC-V single board computers, a pattern emerges. Both the Milk-V Mars (SiFive U74, 4 cores, 936s) and the Orange Pi RV2 (Ky X1, 8 cores, 651s) occupy a performance tier roughly 10-15x slower than mainstream ARM platforms. This isn't a coincidence - it reflects the current state of RISC-V application processor development.

The good news is that this gap isn't architectural. Nothing about the RISC-V instruction set prevents high-performance implementations. SiFive's P-series cores, Ventana's Veyron, and Alibaba's Xuantie C920 all promise ARM-competitive performance. The gap exists because the affordable SBC market is currently served by first-generation cores on older process nodes with immature compiler support.

The bad news is that closing this gap requires simultaneous progress on multiple fronts: newer core designs with out-of-order execution, migration to modern process nodes (7nm and below), compiler optimizations specific to new microarchitectures, and operating system tuning for RISC-V hardware features. This is years of work, and it's unclear whether the SBC market generates enough volume to justify the investment.

For now, RISC-V single board computers remain in the "interesting to explore, impractical to deploy" category. The Milk-V Mars embodies this perfectly: a board that works, runs real software, and delivers real results - just not quickly enough to compete with the ARM and x86 boards sitting next to it on the shelf.

Conclusion

The Milk-V Mars is a functional, stable, and affordable RISC-V single board computer that delivers on its basic promise: a Linux-capable platform built on SiFive's pioneering U74 cores. Its 8GB of RAM, Gigabit Ethernet, and standard Debian environment make it a reasonable development platform for RISC-V exploration.

Its performance, however, tells the honest story of where RISC-V stands in early 2026. At 936 seconds average for our Rust compilation benchmark, the Mars is the slowest board we've tested - 15x slower than the Orange Pi 5 Max, 12.2x slower than the Raspberry Pi 5, and 1.4x slower than the Orange Pi RV2. These numbers reflect the U74's in-order pipeline, 1.5 GHz clock speed, and 28nm process node, compounded by RISC-V's still-maturing compiler toolchain.

The remarkable consistency across benchmark runs (0.3% standard deviation) shows that the hardware is well-behaved and thermally stable - it's simply not fast. The board does exactly what it's supposed to do; it just does it slowly by modern standards.

For RISC-V enthusiasts, the Milk-V Mars offers an affordable window into the architecture that may eventually reshape computing. For everyone else, the Raspberry Pi 5 remains the obvious choice for general-purpose single board computing. The Mars is a board for the curious and the patient - those willing to trade performance today for a front-row seat to an architectural revolution that's still finding its footing.

The question isn't whether RISC-V will eventually match ARM and x86 performance in affordable SBCs. It will. The question is when, and whether boards like the Milk-V Mars will be remembered as charming relics of the early days or as stepping stones that helped build the ecosystem that made RISC-V competitive. Either way, they deserve a place in the story.

Specifications Summary

Processor:

• StarFive JH7110 (28nm process)
• 4x SiFive U74-MC @ 1.5 GHz (RV64GC: rv64imafdc)
• 1x SiFive S7 monitor core
• MMU: Sv39

Memory & Storage:

• 8GB LPDDR4 RAM (2GB and 4GB options also available)
• microSD card slot
• eMMC module support

Video:

• HDMI output
• Hardware video decoding support

Connectivity:

• Gigabit Ethernet
• USB 3.0 and USB 2.0 ports
• 40-pin GPIO header (Raspberry Pi compatible)
• I2C, SPI, UART

Physical:

• Compact SBC form factor
• Passive cooling adequate for sustained workloads

Benchmark Performance:

• Rust compilation: 936.18 seconds average
• 15.0x slower than Orange Pi 5 Max (ARM64, RK3588)
• 12.2x slower than Raspberry Pi 5 (ARM64, BCM2712)
• 5.6x slower than Banana Pi CM5-Pro (ARM64, RK3576)
• 2.5x slower than Horizon X3 CM (ARM64, Sunrise X3)
• 1.4x slower than Orange Pi RV2 (RISC-V, Ky X1)
• Standard deviation: 2.85 seconds (0.30% - excellent consistency)

Software:

• Debian GNU/Linux Bookworm
• Linux kernel 5.15.0 (StarFive patches)
• Rust 1.93.1 (official rustup support for riscv64gc)

Recommendation: Suitable for RISC-V exploration and development; not competitive with ARM or x86 alternatives for performance-sensitive workloads.